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Specification and Formal Verification
of
Interconnect Bus Protocols

Lubomir Ivanov
Department of Computer Science
Stevens Institute of Technology
Hoboken, NJ 07030
livanov@cs.stevens-tech.edu

 
Ramakrishna Nunna
Department of Electrical and Computer Engineering
California State University Fresno, MS 94
Fresno, CA 93740
rnunna@csufresno.edu
Abstract
In this paper, we apply a formal verification framework based on partial orders to verify the timing behaviors of communication/interconnect protocols such as Handshaking and PCI. Our methodology aims to reduce the high complexity of the algorithms incorporated in first-generation verification tools.